1. Field of the Invention
The present invention relates to a data protection circuit for a semiconductor memory device, and more particularly, to an improved data protection circuit for a semiconductor memory device, wherein an address signal is encoded by a key data signal inputted by a user for thereby protecting memory cell data.
2. Description of the Background Art
As shown in FIG. 1, a conventional semiconductor memory device includes: a row address decoder 10 decoding an n-bit row address signal of an address signal ADD inputted from an external address signal generator (not shown) and thereby selecting a word line; a column address decoder 20 decoding an m-bit column address signal of an address signal ADD inputted from the external address signal generator (not shown) and thereby selecting a bit line; and a memory cell array 30 storing data signals written into memory cells thereof selected by word lines and bit lines in accordance with output signals from the row address decoder 10 and the column address decoder 20, and externally outputting the stored data read from the memory cells selected therein.
The operation of the thusly constituted conventional semiconductor memory device will now be described with reference to FIG. 1.
First, when the n-bit row address signal and the m-bit column address signal of the address signal ADD are inputted from the external address signal generator (not shown), the row address decoder 10 decodes the n-bit row address signal and selects a word line of the memory cell array 30, whereas the column address decoder 20 decodes the m-bit column address signal and selects a bit line of the memory cell array 30.
During a read operation, the data signals stored in respective cells of the memory cell array 30 that correspond to the word lines and the bit lines which are selected by the row address decoder 10 and the column address decoder 20 are externally outputted through an output terminal in accordance with a read operation control by a memory controller (not shown).
Also, during a write operation, new data signals are stored in respective memory cells of the memory cell array 30 selected by the row address decoder 10 and the column address decoder 20, in accordance with a write operation control by the memory controller (not shown).
However, the conventional memory device has a disadvantage, in that the data stored in a memory cells may be read out even by a simple knowledge of a memory address, whereby the data may be accessed by others besides an authorized user.